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gnucap:manual:languages:verilog [2023/12/20 10:53] felixs reference examples in repo |
gnucap:manual:languages:verilog [2024/01/30 11:47] (current) felixs lang_verilog now in mgsim |
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| ==== new/WIP ==== | ==== new/WIP ==== | ||
| - | This relates to task 2a in [[gnucap:projects:nlnet:verilogams]]. The following is implemented in the modelgen-verilog package. Load it with "load vams/lang_verilog.so", or start gnucap with "-a vams/lang_verilog.so". See the examples directory in gnucap-modelgen-verilog for various live applications. | + | This relates to task 2a in [[gnucap:projects:nlnet:verilogams]]. The following is implemented in the modelgen-verilog package and bundled with the device plugins ("mgsim") therein. See the examples directory in gnucap-modelgen-verilog for various live applications. |
| A "paramset" statement creates a new type from an existing type. It becomes a "master" that can be instantiated later. It is similar to a spice ".model". | A "paramset" statement creates a new type from an existing type. It becomes a "master" that can be instantiated later. It is similar to a spice ".model". | ||